FPGA Professional Association
A volunteer-run organization for FPGA engineers — career resources, open-source tools, and a community that takes the profession seriously.
The moment we’re in
FPGA engineering is in the middle of the fastest change in its history. AI now writes code and runs the EDA tools — an agent recently carried a design from empty repository to measured neural-network inference on a $129 board — and it gets better with every model and harness release. For forty years the constraint on this work was how fast a design could be executed. That constraint is lifting, and it is moving to a better one: which designs are worth building.
There has never been a more interesting time to be an FPGA engineer, and change this fast is easier to navigate with company. The association helps engineers make the shift — with measured benchmarks, honest evidence about what the tools can and cannot do, and a community focused on solving harder problems.
What’s available now
- Open-source tooling.
- CovertEDA — a replacement GUI for AMD/Xilinx Vivado, Intel/Altera Quartus Prime, Lattice Radiant, and Microchip Libero SoC. GUIs across EDA are reaching end of life: coding agents such as Claude Code, opencode, and Codex with 2026 models drive the same tooling headless. See tools.
- Free resources.
- Salary survey results, interview preparation, vendor-neutral security and verification references. Browse resources.
- Blog.
- Writing on tools, career, and the practice of FPGA engineering. Read the blog.
- Community.
- Volunteer-led, contribution-driven, no paywalled gatekeeping. Get involved.
- Mailing list.
- Low-volume announcements: new resources, tool releases, regional chapter formation. To subscribe, email contact@fpgapa.org.
How we operate
The association is volunteer-driven. There is no paid staff, no venture funding, no corporate ownership. Decisions are made transparently in public repositories. Code and content are open source under permissive licenses. We do not sell members to recruiters and do not run sponsored content. The work happens because working FPGA engineers do it on their own time.